CHAMP-XD3

Download Data Sheet
  • Overview
  • Specifications
  • Downloads
  • Featured Products
  • Request a Quote
  • Product Support
For Digital Signal Processing, HPEC, Cognitive DSP, AI & Machine Learning

For highly compute-intensive industrial, aerospace, and defense applications, the CHAMP-XD3 3U VPX processor card provides Trusted Computing features alongside leading-edge processing technology for unmatched performance.

  • High-Performance Embedded Computing Processing
  • Proven Foundation for Machine Learning
  • Strengthened Security Capabilities
  • Support for Today’s Leading Open Standards including the SOSA™ Technical Standard

This high-performance module, designed for the rigors of digital signal processing (DSP) and emerging machine learning and artificial intelligence applications, delivers incredible processing capability through its 10-core Intel "Ice Lake" Xeon D-1746 processor. The board includes a core function FPGA for critical board functions and general purpose I/O, and includes a dedicated Intelligent Platform Management Interface (IPMI) for system monitoring and health.

Bring new levels of performance to your ISR and EW systems with the CHAMP-XD3:

High-Performance Processing

The CHAMP-XD3 combines the high core count and floating-point performance of the latest Intel “Ice Lake” Xeon D-1746 processors with the substantial bandwidth and system-enabling features of the VITA 3U OpenVPX form-factor. Providing an extended temperature Intel "Ice Lake" Xeon D-1746 LCC processor with 10 cores, the CHAMP-XD3 brings Intel’s new AVX512 floating-point capability to the rugged embedded marketplace. This is coupled with 48 GB of high capacity DDR4-2400 with a bandwidth of >19 GBps per channel with three channels per processor. The extra memory bank and speed provide over 50% more memory bandwidth than prior generation modules ensuring memory accesses are not a bottleneck.

Support for Today’s Leading Open Standards

The CHAMP-XD3 offers variants to support your specific requirements, including models developed in alignment with the SOSA Technical Standard. The CHAMP-XD3 supports a 40GbE Data Plane, dual 10 GbE interfaces, and up to 16 lanes of Gen3 PCI Express® (PCIe) on the Expansion Plane. (Contact factory for Gen4 speeds.)

Strengthened Security Capabilities

The CHAMP-XD3 is part of Curtiss-Wright’s TrustedCOTS portfolio, offering built-in a AMD MPSoC FPGA with embedded dual-core Arm® A53 processor and dual-core R5 processor. In addition, the Ice Lake D processor brings new security capabilities to the Xeon D-1746 processor line, including Total Memory Encryption (TME), Software Guard Extensions (SGX), and Bootguard.

Key Features
  • Intel Ice Lake Xeon D-1746 10-core Processor with integrated Platform Controller Hub (PCH)
  • Extended operating temperature Intel eTEMP SKUs
  • 64-bit CPU architecture with new AVX512 SIMD engine
  • Dual 10 GbE-KR ports
  • 40 GbE Data Plane
  • 48 GB DDR4 memory controller with transfer rates at 2400 MT/s, 19.2 GBytes per channel
  • AMD Zynq UltraScale+ MPSoC FPGA with embedded dual-A53 processor and 4 GB of DDR4 memory for enhanced security or co-processor functionality
  • Microsemi SmartFusion2 FPGA for Tier2 IPMI with HOST 3.0 support
  • Up to 2-channels of NVMe SSD supporting up to 160 GB SLC/480 GB TLC secure storage
  • TrustedCOTS protections
  • Variants aligned with Payload Plug-In Card Profile from SOSA Technical Standard
  • OS support: Alma 8.x Linux, Red Hat Enterprise Linux

 

Applications
  • Multi-mode Radar 
  • Synthetic Aperture Radar (SAR)
  • Signal Intelligence (SIGINT)
  • Electro-Optical/Infrared (EO/IR)
  • Electronic Warfare (EW) 
  • Mission computing 
  • Industrial server applications 
CAPTCHA
This question is for testing whether or not you are a human visitor and to prevent automated spam submissions.
Download Data Sheet

Defense Solutions Product Guide

Explore Curtiss-Wright's mission-critical solutions based on the latest technologies and open standards, highlighting our latest innovative solutions for aerospace and defense.